A constant goal in the development of computer hardware is to design equipment that operates at faster speeds, and therefore, at higher operating frequencies. A fundamental result of increasing the operating frequency of a computer is that machine-cycle time periods must correspondingly decrease. In order to take advantage of the increased processing speeds that have been achieved thus far, it has been necessary to develop data transfer devices that can transfer data at higher data rates, i.e., operate with shorter machine-cycle time periods.
One such data transfer device is the small computer system interface (SCSI). The SCSI is an eight-bit parallel I/O bus that provides a host computer with device independence within a given class of devices. This means that different disk drives, tape drives, printers and communication devices can be added to a host computer without major modifications to the system hardware or software. The SCSI bus provides two different types of configurations: single-ended and differential. The single-ended driver and receiver configuration uses TTL (transistor-transistor logic) logic levels and is primarily intended for cabling applications of up to 6 meters while the differential configuration uses EIA RS-485 signals and is primarily intended for cabling applications of up to 25 meters.
Single-ended bus configurations are normally terminated with a terminator circuit which passively restores a bus line to a nominal 3.3 volts following an active low assertion of the bus line by a driver circuit. An exemplary terminator circuit is shown in FIG. 5. The bus line is passively restored by the voltage divider network comprised of a 220 ohm resistor and a 330 ohm resistor. Typically, the terminated bus line is restored passively to the voltage level developed across the 330 ohm resistor.
Single-ended buses, also referred to as terminated buses, are commonly arranged in a "wired-or" bus configuration. A wired-or bus configuration refers to a bus architecture having a number of line driver circuits coupled to a single bus line. Each line driver circuit that is coupled to the bus line independently asserts and deasserts the bus line for its own purposes.
The most common cabling induced problem associated with single-ended, wired-or bus configurations, such as the SCSI configuration, is the double-clocking of data bytes that occurs at the receiving end of the single-ended bus. The double-clocking problem is due to negative voltage reflections that are encountered by the receiver circuit during the deassertion (low-to-high transition) of a bus signal by the driver circuit at the transmitting end of the bus. The voltage reflections are due to impedance mismatches that occur as a result of poor cable design configurations.
An example of the double-clocking problem is shown in FIG. 3. Line A of FIG. 3 represents the passive reassertion (passive level restoration) of a bus signal by a typical terminator circuit (see FIG. 5). As the voltage level on the bus rises above the receiver threshold level, the output of the receiver (line B) goes high until a negative voltage reflection on the bus line temporarily drives the voltage level of bus line below the receiver threshold, thus causing the output of the receiver to temporarily go low. Once the negative undershoot has passed, the bus line is restored to a high level thereby driving the receiver output high once again.
Accordingly, there is a need for an improved CMOS driver circuit for driving a fast, single-ended, wired-or bus architecture which reduces the magnitude of the voltage reflections on a bus line caused by poor cable designs. Further, there is a need for an improved CMOS line driver circuit for driving a fast, single-ended, wired-or bus architecture which prevents negative voltage reflections from driving a bus line below the threshold level of a receiver coupled to the bus line.